Features
Fully integrated 10/100M Ethernet MAC
IEEE 802.3-compliant MII interface to communicate with an external Ethernet PHY
Configurable full-duplex only and full/half-duplex operation
Management Data Input/Output (MDIO) interface to manage objects in the physical layer
Supports for VLAN frames
Configurable in-band Frame Check Sequence (FCS) field passing on both transmit and receive paths
Auto padding on transmit and stripping on receive paths
Programmable frame length to support Standard Ethernet frames
Configurable flow control through Ethernet MAC Control PAUSE frames
Receive address filter for unicast
Broadcast/multicast filter enable/disable
With one 3KB RAM for frame reception and two 1.5 KB RAM for frame transmission
The two 1.5KB DPRAM work in Ping-Pong mode
FPGA access port available for directly connecting to user design
Supports HME-M5 and HME-M7