HME-P0 combines an extreme flexibility FPGA with hard peripherals, and abundant on-chip SRAM. HME-P0 family is a high-performance device which can be widely used in many applications such as embedded vision applications. The products can support a variety of high bandwidth sensors, display interfaces, and video processing, including LED display, TCON and industry control.
By using these hardened IPs on-chip and configurable soft IPs provided in our software tools, designers are free to concentrate on the unique aspects of their designs.
Feature
SRAM-based FPGA Fabric
- 6-input Lookup Tables, up to 12K
- DFF-based registers, up to 23,040
- performance up to 220MHz
Embedded Memory Block
- 128 programmable dual-port DPRAM memory, 9Kbit
Embedded DSPs block
- 32 multiplier blocks (18 x 18)
- or 64 multiplier blocks (18 x 9)
- or 128 multiplier blocks (10 x 10)
Clock Network
- 32 de-skew global clocks
- 1 OSC, +/-5% frequency accuracy
- 2 PLLs
- dynamic clock management in system
I/O
- 3.3/2.5/1.8/1.5/1.2V LVTTL/LVCMOS general I/O
- programmable source synchronous I/O
- emulated MIPI D-PHY, LVDS Rx, LVDS Tx, BLVDS
- up to 1200 Mb/s per LVDS I/O
Memory
- embedded SRAM Block
- 18 32Kx32b SRAM
Package
LQFP176
FBGA256
VBGA324
Part number | P0P20-M0H1 | P0P20-M1H1 | P0P20-M2H1 | P0P20-M0X1 | P0P20-M0A1 | |
Programmable Logic Block (PLB) |
Logic cells (K) | 20 | 20 | 20 | 20 | 20 |
LUT6 | 11,520 | 11,520 | 11,520 | 11,520 | 11,520 | |
Register | 23,040 | 23,040 | 23,040 | 23,040 | 23,040 | |
Embedded Memory Block (EMB) |
9Kb | 128 | 128 | 128 | 128 | 128 |
Max (Kb) | 1,152 | 1,152 | 1,152 | 1,152 | 1,152 | |
DSP | 18b*18b | 32 | 32 | 32 | 32 | 32 |
PLL | 2 | 2 | 2 | 2 | 2 | |
OSC | RC | 1 | 1 | 1 | 1 | 1 |
SRAM | 128KB | 18 | 18 | 18 | 18 | 18 |
Total (KB) | 2,304 | 2,304 | 2,304 | 2,304 | 2,304 | |
pSRAM | 32Mb | 0 | 1 | 2 | 0 | 0 |
Total(Mb) | 0 | 32 | 64 | 0 | 0 | |
eFuse | 128b | 1 | 1 | 1 | 1 | 1 |
Package (unit: mm) | Max user I/O/LVDS | |||||
LQFP176 (22.00x22.00, 0.4 pitch) | 142(0) | 142(0) | 142(0) | - | - | |
FBGA256 (17.00x17.00, 1.0 pitch) | - | - | - | 186/0 | 179/0 | |
VFBGA324 (15.00x15.00, 0.8 pitch) | - | - | - | 210/4 | - |
Title | Version | Release Date | File Format |
HME-P0 Family FPGA_Data Sheet | V_1.9 | 2024-02-01 | |
HME-P0_Family FPGA_Flyer | V_1.2 | 2024-02-01 | |
HME-P0_pinlist | V_1.5 | 2023-06-11 | Excel |
HME-P0 Family_PS_Programming_Application Notes_EN | V_1.0 | 2023-06-09 |